1. Field of the Invention
The present invention relates to an image processing apparatus, and to a method for controlling an image processor. More particularly, the present invention relates to an image processing apparatus and a method whereby a plurality of inputs/outputs and a plurality of signal processing blocks are connected via a matrix switch.
2. Description of the Related Art
Image processing apparatus referred to as effects switchers have been developed (see Japanese Unexamined Patent Application Publication No. 2007-325112, for example). Such an image processing apparatus performs special effects processing during the production or broadcasting of a program, such as switching images, superimposing subtitles onto images by means of keying, or positioning a separate sub-screen somewhere within the main screen.
FIG. 18 illustrates an exemplary configuration of an image processing apparatus 200 in accordance with the related art. The image processing apparatus 200 includes an image processor 201, a controller 202, a user interface unit 203, and a display 204.
The controller 202 controls the operation of the image processor 201. The user interface unit 203 and the display 204 constitute a user interface, and are connected to the controller 202. The image processor 201 includes input ports 211-1 to 211-6, a matrix switcher 212, signal processing blocks (i.e., Mix/Effects (M/E) blocks) 213-1 to 213-3, an output block 214, and output ports 215-1 to 215-3.
The input ports 211-1 to 211-6 are ports for inputting image signals (i.e., footage) from external equipment. Herein, the external equipment may be players for footage playback, text generators, or CG apparatus, for example. The output ports 215-1 to 215-3 are ports for outputting image signals to external equipment. The signal processing blocks 213-1 to 213-3 process signals for processes such as keying and wiping, for example. The output block 214 performs phase alignment (i.e., one line-delay) and adapts signals to a signal standard, while also processing signals for output.
The matrix switcher 212 supplies selected signals to the internal signal processing blocks and the output block. The signals are selected from among the reentry inputs from the external inputs and the internal signal processing blocks. Although not shown in the drawings, the matrix switcher 212 herein is realized by a plurality of input lines arranged in one direction, a plurality of output lines arranged in another direction and intersecting the input lines, and a plurality of crosspoint switches, which connect the input lines to the output lines at each crosspoint where the input lines and the output lines intersect.
The input ports 211-1 to 211-6 are connected to a portion of the input lines of the matrix switcher 212. In addition, the upstream sides of the signal processing blocks 213-1 to 213-3 are connected to a portion of the output lines of the matrix switcher 212, while the downstream sides are connected to a portion of the input lines of the matrix switcher 212 via reentry paths. In addition, the upstream side of the output block 214 is connected to a portion of the output lines of the matrix switcher 212, while the output ports 215-1 to 215-3 lead from the downstream side.